2.C wrong: Address of the instruction that caused the exception will be written to the mepc register, not the mtvec. mtvec stores the trap handler base address.

3.B Loop unrolling helps most when multiple iterations are independent.

for (i=0; i<100; i=i+1 ) {
    C[i] = A[i] + B[i]
}

8.C Higher associativity will increase power consumption, hardware complexity and access time.

9 - multiprocessor 11 - precise exception

12.A 0.04 L1 miss, so takes from L2 10 cycles 0.02 L2 miss, so takes from mem 200 cycles. 1 inst stall: $0.04\ast 10+0.02\ast 200=4.4$$1.5\ast 4.4=6.6$

15.C D: I2 is not a load.

18 - memory consistency model

20.A

unblocked version: each block causes 16 + 16 misses total: $32\ast (1024/16{)}^2=32\ast 4096$

blocked version: each row causes 64 + 1024 misses total: $1024\ast (64+1024)$

answer: 2:17

22.A

it needs $\lceil i\rceil$